February 2017 DocID029236 Rev 1 1/142
1
AN4860
Application note
DSI Host on STM32F4 Series
and STM32F7 Series microcontrollers
Introduction
A growing demand for smartphone-like, high level graphical user interfaces in embedded
devices is posing big challenges to embedded system designers. The SPI, parallel and
RGB interfaces have been widely used so far to make the connection between an MCU and
a display.
With increasing resolution and refresh rate requirements, a higher number of pins (up to 28
pins in case of the 16.7 million colors displays) and higher pixel clock frequencies are
needed. These requests increase the pin count requirement on MCU side and the overall
PCB complexity and cost due to board size, routing complexity and skew problems between
clock and data.
To address these challenges, STMicroelectronics offers the first MCU products in the
market with an integrated MIPI-DSI Host (see Table 1). These new STM32 products with
DSI Host implement a more effective method for connecting to displays. The MIPI-DSI is a
high-speed, low pin-count serial interface for displays originally targeted for the mobile
industry. The DSI interface has become popular due to its widespread use in mobile phones
and tablets, which has driven down the DSI displays costs and made them attractive for
other consumer markets.
The STM32 MIPI-DSI Host drastically reduces the device’s pin count, enabling an easy
connection with ubiquitous DSI displays available today in the market. Thanks to its low pin-
count and low-power features, the DSI Host is the most effective way to connect to displays
especially for devices which have stringent constraints on size and power consumption like
wearables.
This application note describes the DSI Host interface on STM32F4 Series and STM32F7
Series microcontrollers and focuses on presenting different operating modes of the DSI
Host and providing guidelines to choose the best operating mode depending on an
application’s needs. It also provides practical examples on how to configure the DSI Host
depending on the operating mode.
Related documents
This application note has to be read in conjunction with below documents available at
www.st.com:
•STM32F76xxx and STM32F77xxx advanced ARM®-based 32-bit MCUs (RM0410)
•STM32F469xx and STM32F479xx advanced ARM®-based 32-bit MCUs (RM0386)
•Related STM32F469/479, STM32F7x8 and STM32F7x9 datasheets
Table 1. Applicable products
Type Product lines
Microcontrollers STM32F469/479, STM32F7x8, STM32F7x9
www.st.com
Contents AN4860
2/142 DocID029236 Rev 1
Contents
1 Standards and references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.1 Display interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
2.2 MIPI display specification standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.3 Display interfaces supported by STM32 products . . . . . . . . . . . . . . . . . . 13
2.4 DSI Host availability across STM32 microcontrollers . . . . . . . . . . . . . . . . 16
2.5 DSI Host advantages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.6 DSI Host in a smart architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3 DSI Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1 DSI operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1.1 Command mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1.2 Video mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.2 DSI physical layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.2.1 PHY configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.2.2 PHY signaling mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Data lane states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
3.2.3 Data lane operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Control mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
High-speed transmission mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Escape mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
3.2.4 Bidirectional lanes and bus turnaround procedure . . . . . . . . . . . . . . . . 30
3.2.5 Clock-lane power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
High-speed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Ultra-low-power state (ULPS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
3.3 DSI protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.3.1 Packet structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Long packet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Short packet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Data identifier byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Data protection (ECC and checksum) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
3.3.2 End of transmission (EoT) packet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.3.3 Packet transmission modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
